The document WO 84/00629 discloses a memory system with multi-dimensional access. This document relates to the writing and reading of a two-dimensional data table stored in a memory. In order to enable the addressing of the data words either rows-wise or column-wise in the table, the data is arranged in the memory in a special way so that it can be read/written by means of a single bus. To this end, the data is loaded one row after the other, the first row loaded corresponding to the first row of the table, the second row loaded corresponding to the second row of the table, be it that the data of one memory block have been subjected to a circular permutation. Each row loaded is thus shifted through one memory block with respect to the preceding row and hence subjected to the corresponding circular permutation. The data which was arranged in a column of the table is thus arranged along a diagonal of the memory. The data which was situated in a row of the table is still situated in the row of the same rank of the memory, be it with a given circular permutation. For the addressing of a row or a column of the table, distributed over several memory columns, it is thus necessary to determine each time the real address in the memory by means of an address modifier. The data which appears with a given permutation can be reestablished in the initial order by means of a member which performs the rotation of the data. Each address modifier associated with each column performs an address calculation which depends on the row and the column of the table and on the column of the memory. Such calculations necessitate a large quantity of hardware which has the drawback that it delays the calculation of the real addresses and that it is too elaborate to enable a compact integrated realization.